System on chip (SOC) applications frequently require CMOS devices to be manufactured on a same wafer as devices such as bipolar junction transistors (BJTs) and rectifiers. Each of these types of device has unique performance constraints and trade-offs. While it is desirable to manufacture such devices simultaneously, and typically using the same process steps, steps to improve the performance of one type of device, e.g. a CMOS transistor, may lead to degraded performance of other devices, such as a BJT. What is needed then is manufacturing structures and methods having improved performance for different types of devices.